The present invention relates to semiconductor integrated circuits and their fabrication.
The performance of a transistor can be improved by applying a stress of a correct type and sufficient magnitude to the channel region of the transistor. However, heretofore, structures and processes used to form regions that apply such stress have frequently been complicated and some have been difficult to perform from a perspective of process control.
Accordingly, it would be desirable to provide a structure and method of fabricating the same, by which a desirable amount of stress of a particular type, e.g., compressive type or tensile type stress, is applied to the channel region of a transistor.